As the speed of input-output (I/O) transceivers increases, noise margin reduces for signals transmitted by an I/O transmitter and received by a corresponding I/O receiver over a transmission line. The term “noise margin” herein refers to an amount corresponding to one or more signal integrity properties (e.g., jitter tolerance, signal eye height and width, overshoot, undershoot, etc.) of a signal that exceed a minimum level for proper reception of the signal at an I/O receiver. A higher noise margin for a signal to be received means that it is easier for the I/O receiver to identify the signal content as compared to a signal having a low noise margin. Noise margin for a signal also degrades due to transmission line losses and/or inter-symbol interference (ISI) on the signal.
ISI is a form of noise on a signal which is caused by successive transmission of data samples on a transmission line. Such successive transmission of data samples interferes with previously transmitted data samples on the same transmission line. Such interference is constructive and/or destructive interference on the transmitted data signal and may result in a blurred signal at the I/O receiver end. A blurred signal at the receiver end caused by ISI has a small signal eye height and width and so it becomes difficult for the I/O receiver to read the received signal. The term “read” herein refers to sampling of the data signal by a clock signal to identify the logical value of the received signal (i.e., the data signal).
ISI also reduces jitter tolerance of the I/O system because ISI takes away timing budget (also called guard-band) from the signals transmitted and received in the I/O system. One method to reduce the effects of ISI (i.e., to compensate for ISI) is to implement equalizers at the I/O receivers for the received data signals. An example of a receiver equalizer is a Decision Feedback Equalizer (DFE). However, application of DFE on data samples of a data signal does not compensate for ISI on edge samples of the data signal. Another example of an equalizer is a linear equalizer such as a Continuous Time Liner Equalizer (CTLE). However, CTLE is ineffective to compensate for ISI on edge and data samples of the data signal because CTLE are sensitive to skews in process technology, temperature, and supply voltage levels.
The term “data samples” herein refers to data points on the data signal sampled by a data clock signal and are used by the DFE to cancel ISI on those data points of the data signal. The term also corresponds to the logical low and high values of the sampled data signal. The term “edge samples” herein refers to data points of the data signal sampled by an edge clock. In some cases, the edge clock is positioned at a crossing point (intersection) of a rising and falling data signal. Such data points are ideally located mid-way of logical high and logical low levels of the data signal.
The edge samples provide a reference point to a clock generation circuit that generates a clock signal and positions the clock signal relative to the received data signal so that the receiver may sample the received data signal properly. However, application of DFE on the data samples of the data signal does not cancel or compensate for ISI on the edge samples of the data signal which are eventually used to position a sampling clock relative to the received data signal.